Overview & Demo

Flex Logix eFPGA Presentation
EFLX eFPGA Product Overview
EFLX DSP Overview
EFLX Demo

Product Briefs

EFLX 4K Product Brief for TSMC 6N/7N 
EFLX 4K Product Brief for TSMC 12FFC+/12FFC/16FFC+/FFC/FF+
EFLX 4K Product Brief for GlobalFoundries 12LP/LP+
EFLX 4K Product Brief for GlobalFoundries 12LP/LP+ RADHARD
EFLX 4K Product Brief for TSMC 22ULP/28 HPC/HPC+
EFLX 4K Product Brief for GlobalFoundries 22FDX
EFLX 1K Product Brief for TSMC 40 ULP/LP

Application Notes

Optimizing RTL code for EFLX
Benchmarking eFPGA Performance
EFLX as an Accelerator on AHB and AXI Buses
EFLX on APB Bus for Flexible I/O
I/O Pin Mux using EFLX
EFLX for Energy Efficient DSP
EFLX as a Silicon Debugger
Connecting RAMS with EFLX Arrays
 

InferX™ X1

 

Linley Fall Processor Conference: a Flexible and Powerful Architecture for Edge AI
Linley Spring Processor Conference: Easy to use X1 Inference Compiler Software
Linley Spring Processor Conference: Low Power X1 M.2 Card
Microprocessor Report Article

Inference Efficiency

 

Measuring AI Inference Efficiency
TOPS, Memory, Throughput & Inference Efficiency
Lies, Damn Lies and TOPS/Watt: the Right Metric is Throughput/Watt
Inference Memory Subsystem Tradeoffs
Do Large Batches Always Improve Neural Network Throughput?

Videos

February 2020 the Importance of Software for Architecting Inference Accelerators